Static Timing Analysis

Project : P5LP_PD2
Build Time : 10/15/13 19:03:37
Device : CY8C5868LTI-LP039
Temperature : -40C - 85/125C
Vdda : 5.00
Vddd : 5.00
Vio0 : 5.00
Vio1 : 5.00
Vio2 : 5.00
Vio3 : 5.00
Voltage : 5.0
Vusb : 5.00
Expand All | Collapse All | Show All Paths | Hide All Paths
+ Timing Violation Section
Note: If your design will only ever run at typical room temperatures, selecting the narrower temperature range in the system DWR for your application helps the tool to find timing-compliant routing solutions.
Violation Source Clock Destination Clock Slack(ns)
Setup
CyBUS_CLK GenClock -2.637
GenClock PhDet1_UpDnClock -3.813
+ Clock Summary Section
Clock Domain Nominal Frequency Required Frequency Maximum Frequency Violation
CyILO CyILO 100.000 kHz 100.000 kHz N/A
CyIMO CyIMO 24.000 MHz 24.000 MHz N/A
CyMASTER_CLK CyMASTER_CLK 48.000 MHz 48.000 MHz 40.575 MHz Frequency
PhDet1_UpDnClock CyMASTER_CLK 12.000 MHz 12.000 MHz 34.704 MHz
GenClock CyMASTER_CLK 1.000 MHz 1.000 MHz 40.575 MHz
PhDet1_DacClock CyMASTER_CLK 50.000 kHz 50.000 kHz N/A
CyBUS_CLK CyMASTER_CLK 48.000 MHz 48.000 MHz 42.608 MHz Frequency
CyPLL_OUT CyPLL_OUT 48.000 MHz 48.000 MHz N/A
PhDet1_DacClock(routed) PhDet1_DacClock(routed) 50.000 kHz 50.000 kHz N/A
+ Register to Register Section
+ Setup Subsection
Path Delay Requirement : 20.8333ns(48 MHz)
Affects clock : CyMASTER_CLK
Source Destination FMax Delay (ns) Slack (ns) Violation
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_0 42.608 MHz 23.470 -2.637 SETUP
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.580
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:Net_219\/main_0 3.710
macrocell25 U(2,1) 1 \PhaseGen1:Net_219\ \PhaseGen1:Net_219\/main_0 \PhaseGen1:Net_219\/q 3.350
Route 1 \PhaseGen1:Net_219\ \PhaseGen1:Net_219\/q \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_0 2.310
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ SETUP 11.520
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1274/ar_0 130.107 MHz 7.686 13.147
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.580
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1274/ar_0 5.106
macrocell1 U(2,0) 1 Net_1274 RECOVERY -0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1336/ar_0 130.107 MHz 7.686 13.147
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.580
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1336/ar_0 5.106
macrocell2 U(2,0) 1 Net_1336 RECOVERY -0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/ar_0 145.582 MHz 6.869 13.964
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.580
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/ar_0 4.289
macrocell26 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ RECOVERY -0.000
Clock Skew 0.000
Path Delay Requirement : 1000ns(1 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 56.638 MHz 17.656 982.344
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/clock \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb 3.850
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/z0_comb \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_2 2.286
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ SETUP 11.520
Clock Skew 0.000
\PhaseGen1:PWM:PWMUDB:runmode_enable\/q \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 66.287 MHz 15.086 984.914
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell26 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ \PhaseGen1:PWM:PWMUDB:runmode_enable\/clock_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/q 1.250
Route 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ \PhaseGen1:PWM:PWMUDB:runmode_enable\/q \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 2.316
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ SETUP 11.520
Clock Skew 0.000
\PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PhaseGen1:Net_212\/main_2 87.017 MHz 11.492 988.508
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/clock \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb 5.680
Route 1 \PhaseGen1:PWM:PWMUDB:cmp1_less\ \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cl0_comb \PhaseGen1:Net_212\/main_2 2.302
macrocell23 U(2,1) 1 \PhaseGen1:Net_212\ SETUP 3.510
Clock Skew 0.000
\PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/ce0_comb \PhaseGen1:Net_212\/main_1 91.937 MHz 10.877 989.123
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/clock \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/ce0_comb 5.060
Route 1 \PhaseGen1:PWM:PWMUDB:cmp1_eq\ \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/ce0_comb \PhaseGen1:Net_212\/main_1 2.307
macrocell23 U(2,1) 1 \PhaseGen1:Net_212\ SETUP 3.510
Clock Skew 0.000
\PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/ce1_comb \PhaseGen1:Net_217\/main_1 92.123 MHz 10.855 989.145
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/clock \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/ce1_comb 5.030
Route 1 \PhaseGen1:PWM:PWMUDB:cmp2_eq\ \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/ce1_comb \PhaseGen1:Net_217\/main_1 2.315
macrocell24 U(2,1) 1 \PhaseGen1:Net_217\ SETUP 3.510
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:Net_15\/ar_0 106.655 MHz 9.376 990.624
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:Net_321\/main_0 2.530
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_0 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_15\/ar_0 2.246
macrocell5 U(3,0) 1 \PhDet1:Net_15\ RECOVERY -0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:Net_9\/ar_0 106.655 MHz 9.376 990.624
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:Net_321\/main_0 2.530
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_0 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_9\/ar_0 2.246
macrocell9 U(3,0) 1 \PhDet1:Net_9\ RECOVERY -0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:Net_15\/ar_0 106.826 MHz 9.361 990.639
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:Net_321\/main_1 2.515
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_1 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_15\/ar_0 2.246
macrocell5 U(3,0) 1 \PhDet1:Net_15\ RECOVERY -0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:Net_9\/ar_0 106.826 MHz 9.361 990.639
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:Net_321\/main_1 2.515
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_1 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_9\/ar_0 2.246
macrocell9 U(3,0) 1 \PhDet1:Net_9\ RECOVERY -0.000
Clock Skew 0.000
\PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PhaseGen1:Net_212\/main_0 112.108 MHz 8.920 991.080
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell4 U(2,0) 1 \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\ \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/clock \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 2.580
Route 1 \PhaseGen1:PWM:PWMUDB:control_7\ \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PhaseGen1:Net_212\/main_0 2.830
macrocell23 U(2,1) 1 \PhaseGen1:Net_212\ SETUP 3.510
Clock Skew 0.000
Path Delay Requirement : 20.8333ns(48 MHz)
Affects clock : CyMASTER_CLK
Source Destination FMax Delay (ns) Slack (ns) Violation
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 40.575 MHz 24.646 -3.813 SETUP
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_0 2.530
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_0 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 2.716
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 9.710
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 5.090
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 40.599 MHz 24.631 -3.798 SETUP
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 2.515
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 2.716
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 9.710
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 5.090
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 46.803 MHz 21.366 -0.533 SETUP
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_0 2.530
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_0 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 2.716
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ SETUP 11.520
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_2 46.814 MHz 21.361 -0.528 SETUP
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_0 2.530
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_0 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_2 2.711
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 11.520
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 46.836 MHz 21.351 -0.518 SETUP
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 2.515
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 2.716
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ SETUP 11.520
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_2 46.847 MHz 21.346 -0.513 SETUP
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 2.515
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_2 2.711
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 11.520
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/main_0 119.474 MHz 8.370 12.463
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/main_0 3.610
macrocell22 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\ SETUP 3.510
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_0 119.660 MHz 8.357 12.476
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_0 3.597
macrocell10 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_down\ SETUP 3.510
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_0 119.660 MHz 8.357 12.476
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_0 3.597
macrocell12 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_up\ SETUP 3.510
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/main_0 119.660 MHz 8.357 12.476
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/main_0 3.597
macrocell14 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\ SETUP 3.510
Clock Skew 0.000
Path Delay Requirement : 83.3333ns(12 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 34.704 MHz 28.815 54.518
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 2.320
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.z0__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0i 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0i \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb 2.960
Route 1 \PhDet1:UpDnCounter:CounterUDB:underflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb \PhDet1:UpDnCounter:CounterUDB:reload\/main_1 2.672
macrocell17 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/main_1 \PhDet1:UpDnCounter:CounterUDB:reload\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 2.713
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 9.710
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 5.090
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 34.735 MHz 28.789 54.544
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 2.730
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.ff0__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ff0i 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ff0i \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb 2.960
Route 1 \PhDet1:UpDnCounter:CounterUDB:overflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb \PhDet1:UpDnCounter:CounterUDB:reload\/main_0 2.236
macrocell17 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/main_0 \PhDet1:UpDnCounter:CounterUDB:reload\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 2.713
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 9.710
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 5.090
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 36.516 MHz 27.385 55.948
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb 3.850
Route 1 \PhDet1:UpDnCounter:CounterUDB:underflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb \PhDet1:UpDnCounter:CounterUDB:reload\/main_1 2.672
macrocell17 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/main_1 \PhDet1:UpDnCounter:CounterUDB:reload\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 2.713
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 9.710
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 5.090
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 36.551 MHz 27.359 55.974
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb 4.260
Route 1 \PhDet1:UpDnCounter:CounterUDB:overflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb \PhDet1:UpDnCounter:CounterUDB:reload\/main_0 2.236
macrocell17 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/main_0 \PhDet1:UpDnCounter:CounterUDB:reload\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 2.713
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 9.710
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 5.090
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sCTRLReg:SyncCtl:ctrlreg\/control_7 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 38.322 MHz 26.095 57.238
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell2 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:sCTRLReg:SyncCtl:ctrlreg\ \PhDet1:UpDnCounter:CounterUDB:sCTRLReg:SyncCtl:ctrlreg\/clock \PhDet1:UpDnCounter:CounterUDB:sCTRLReg:SyncCtl:ctrlreg\/control_7 2.580
Route 1 \PhDet1:UpDnCounter:CounterUDB:control_7\ \PhDet1:UpDnCounter:CounterUDB:sCTRLReg:SyncCtl:ctrlreg\/control_7 \PhDet1:UpDnCounter:CounterUDB:count_enable\/main_0 2.319
macrocell11 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_enable\ \PhDet1:UpDnCounter:CounterUDB:count_enable\/main_0 \PhDet1:UpDnCounter:CounterUDB:count_enable\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:count_enable\ \PhDet1:UpDnCounter:CounterUDB:count_enable\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_1 3.046
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 9.710
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 5.090
Clock Skew 0.000
\PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 39.085 MHz 25.585 57.748
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell8 U(3,1) 1 \PhDet1:Net_440\ \PhDet1:Net_440\/clock_0 \PhDet1:Net_440\/q 1.250
Route 1 \PhDet1:Net_440\ \PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_4 3.469
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_4 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 2.716
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 9.710
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 5.090
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 39.162 MHz 25.535 57.798
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 2.320
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.z0__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0i 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0i \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb 2.960
Route 1 \PhDet1:UpDnCounter:CounterUDB:underflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb \PhDet1:UpDnCounter:CounterUDB:reload\/main_1 2.672
macrocell17 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/main_1 \PhDet1:UpDnCounter:CounterUDB:reload\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 2.713
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ SETUP 11.520
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_0 39.173 MHz 25.528 57.805
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 2.320
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.z0__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/z0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0i 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0i \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb 2.960
Route 1 \PhDet1:UpDnCounter:CounterUDB:underflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb \PhDet1:UpDnCounter:CounterUDB:reload\/main_1 2.672
macrocell17 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/main_1 \PhDet1:UpDnCounter:CounterUDB:reload\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_0 2.706
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 11.520
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 39.202 MHz 25.509 57.824
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 2.730
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.ff0__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ff0i 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ff0i \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb 2.960
Route 1 \PhDet1:UpDnCounter:CounterUDB:overflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb \PhDet1:UpDnCounter:CounterUDB:reload\/main_0 2.236
macrocell17 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/main_0 \PhDet1:UpDnCounter:CounterUDB:reload\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_0 2.713
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ SETUP 11.520
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_0 39.213 MHz 25.502 57.831
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 2.730
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.ff0__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/ff0 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ff0i 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ff0i \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb 2.960
Route 1 \PhDet1:UpDnCounter:CounterUDB:overflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb \PhDet1:UpDnCounter:CounterUDB:reload\/main_0 2.236
macrocell17 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/main_0 \PhDet1:UpDnCounter:CounterUDB:reload\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:reload\ \PhDet1:UpDnCounter:CounterUDB:reload\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_0 2.706
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ SETUP 11.520
Clock Skew 0.000
+ Hold Subsection
Source Destination Slack (ns) Violation
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/ar_0 6.329
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.040
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/ar_0 4.289
macrocell26 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ REMOVAL 0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1274/ar_0 7.146
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.040
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1274/ar_0 5.106
macrocell1 U(2,0) 1 Net_1274 REMOVAL 0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1336/ar_0 7.146
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.040
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1336/ar_0 5.106
macrocell2 U(2,0) 1 Net_1336 REMOVAL 0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_0 11.410
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.040
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:Net_219\/main_0 3.710
macrocell25 U(2,1) 1 \PhaseGen1:Net_219\ \PhaseGen1:Net_219\/main_0 \PhaseGen1:Net_219\/q 3.350
Route 1 \PhaseGen1:Net_219\ \PhaseGen1:Net_219\/q \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_0 2.310
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
\PhaseGen1:PWM:PWMUDB:runmode_enable\/q \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 3.566
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell26 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ \PhaseGen1:PWM:PWMUDB:runmode_enable\/clock_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/q 1.250
Route 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ \PhaseGen1:PWM:PWMUDB:runmode_enable\/q \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\/cs_addr_1 2.316
datapathcell3 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:sP8:pwmdp:u0\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:Net_15\/main_1 3.767
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:Net_15\/main_1 2.517
macrocell5 U(3,0) 1 \PhDet1:Net_15\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:Net_9\/main_1 3.780
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:Net_9\/main_1 2.530
macrocell9 U(3,0) 1 \PhDet1:Net_9\ HOLD 0.000
Clock Skew 0.000
Net_1274/q \PhDet1:Net_9\/main_0 3.923
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell1 U(2,0) 1 Net_1274 Net_1274/clock_0 Net_1274/q 1.250
Route 1 Net_1274 Net_1274/q \PhDet1:Net_9\/main_0 2.673
macrocell9 U(3,0) 1 \PhDet1:Net_9\ HOLD 0.000
Clock Skew 0.000
Net_1274/q \PhDet1:Net_9\/clk_en 3.969
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell1 U(2,0) 1 Net_1274 Net_1274/clock_0 Net_1274/q 1.250
Route 1 Net_1274 Net_1274/q \PhDet1:Net_9\/clk_en 2.719
macrocell9 U(3,0) 1 \PhDet1:Net_9\ HOLD 0.000
Clock Skew 0.000
\PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PhaseGen1:Net_212\/main_0 4.870
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell4 U(2,0) 1 \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\ \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/clock \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 2.040
Route 1 \PhaseGen1:PWM:PWMUDB:control_7\ \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PhaseGen1:Net_212\/main_0 2.830
macrocell23 U(2,1) 1 \PhaseGen1:Net_212\ HOLD 0.000
Clock Skew 0.000
\PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PhaseGen1:Net_217\/main_0 4.870
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell4 U(2,0) 1 \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\ \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/clock \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 2.040
Route 1 \PhaseGen1:PWM:PWMUDB:control_7\ \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PhaseGen1:Net_217\/main_0 2.830
macrocell24 U(2,1) 1 \PhaseGen1:Net_217\ HOLD 0.000
Clock Skew 0.000
\PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PhaseGen1:PWM:PWMUDB:runmode_enable\/main_0 4.870
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell4 U(2,0) 1 \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\ \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/clock \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 2.040
Route 1 \PhaseGen1:PWM:PWMUDB:control_7\ \PhaseGen1:PWM:PWMUDB:genblk1:ctrlreg\/control_7 \PhaseGen1:PWM:PWMUDB:runmode_enable\/main_0 2.830
macrocell26 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ HOLD 0.000
Clock Skew 0.000
\PhaseGen1:Net_212\/q Net_1336/main_0 4.984
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell23 U(2,1) 1 \PhaseGen1:Net_212\ \PhaseGen1:Net_212\/clock_0 \PhaseGen1:Net_212\/q 1.250
Route 1 \PhaseGen1:Net_212\ \PhaseGen1:Net_212\/q Net_1336/main_0 3.734
macrocell2 U(2,0) 1 Net_1336 HOLD 0.000
Clock Skew 0.000
\PhaseGen1:Net_217\/q Net_1274/main_0 5.037
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell24 U(2,1) 1 \PhaseGen1:Net_217\ \PhaseGen1:Net_217\/clock_0 \PhaseGen1:Net_217\/q 1.250
Route 1 \PhaseGen1:Net_217\ \PhaseGen1:Net_217\/q Net_1274/main_0 3.787
macrocell1 U(2,0) 1 Net_1274 HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_1 67.334
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_1 3.584
macrocell10 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_down\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_1 67.334
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_1 3.584
macrocell12 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_up\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/main_1 67.334
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/main_1 3.584
macrocell14 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/main_1 67.346
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/main_1 3.596
macrocell22 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_0 67.347
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_0 3.597
macrocell10 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_down\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_0 67.347
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_0 3.597
macrocell12 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_up\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/main_0 67.347
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/main_0 3.597
macrocell14 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/main_0 67.360
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/main_0 3.610
macrocell22 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_2 72.326
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 2.515
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/cs_addr_2 2.711
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 72.331
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 2.515
macrocell13 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/main_1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q 3.350
Route 1 \PhDet1:UpDnCounter:CounterUDB:dp_dir\ \PhDet1:UpDnCounter:CounterUDB:dp_dir\/q \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/cs_addr_2 2.716
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ HOLD 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 3.210
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell1 U(2,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb 3.210
Route 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0.co_msb__sig\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u0\/co_msb \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ci 0.000
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ HOLD 0.000
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_2 3.540
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell22 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\ \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/clock_0 \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/q 1.250
Route 1 \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\ \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_2 2.290
macrocell12 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_up\ HOLD 0.000
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_2 3.544
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell14 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\ \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/clock_0 \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/q 1.250
Route 1 \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\ \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_2 2.294
macrocell10 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_down\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_3 3.832
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell8 U(3,1) 1 \PhDet1:Net_440\ \PhDet1:Net_440\/clock_0 \PhDet1:Net_440\/q 1.250
Route 1 \PhDet1:Net_440\ \PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:count_down\/main_3 2.582
macrocell10 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_down\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_3 3.832
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell8 U(3,1) 1 \PhDet1:Net_440\ \PhDet1:Net_440\/clock_0 \PhDet1:Net_440\/q 1.250
Route 1 \PhDet1:Net_440\ \PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:count_up\/main_3 2.582
macrocell12 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:count_up\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/main_2 3.832
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell8 U(3,1) 1 \PhDet1:Net_440\ \PhDet1:Net_440\/clock_0 \PhDet1:Net_440\/q 1.250
Route 1 \PhDet1:Net_440\ \PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\/main_2 2.582
macrocell14 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:dwncnt_stored\ HOLD 0.000
Clock Skew 0.000
\PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/main_2 3.835
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell8 U(3,1) 1 \PhDet1:Net_440\ \PhDet1:Net_440\/clock_0 \PhDet1:Net_440\/q 1.250
Route 1 \PhDet1:Net_440\ \PhDet1:Net_440\/q \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\/main_2 2.585
macrocell22 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:upcnt_stored\ HOLD 0.000
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ce1_comb \PhDet1:UpDnCounter:CounterUDB:prevCompare\/main_1 5.924
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ce1_comb 3.090
Route 1 \PhDet1:UpDnCounter:CounterUDB:cmp_equal\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/ce1_comb \PhDet1:UpDnCounter:CounterUDB:prevCompare\/main_1 2.834
macrocell16 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:prevCompare\ HOLD 0.000
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb \PhDet1:UpDnCounter:CounterUDB:overflow_reg_i\/main_0 5.983
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb 2.850
Route 1 \PhDet1:UpDnCounter:CounterUDB:overflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/f0_comb \PhDet1:UpDnCounter:CounterUDB:overflow_reg_i\/main_0 3.133
macrocell15 U(2,1) 1 \PhDet1:UpDnCounter:CounterUDB:overflow_reg_i\ HOLD 0.000
Clock Skew 0.000
\PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb \PhDet1:UpDnCounter:CounterUDB:sSTSReg:rstSts:stsreg\/status_1 6.343
Type Location Fanout Instance/Net Source Dest Delay (ns)
datapathcell2 U(3,0) 1 \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/clock \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb 3.270
Route 1 \PhDet1:UpDnCounter:CounterUDB:underflow\ \PhDet1:UpDnCounter:CounterUDB:sC16:counterdp:u1\/z0_comb \PhDet1:UpDnCounter:CounterUDB:sSTSReg:rstSts:stsreg\/status_1 5.073
statusicell1 U(3,1) 1 \PhDet1:UpDnCounter:CounterUDB:sSTSReg:rstSts:stsreg\ HOLD -2.000
Clock Skew 0.000
+ Clock To Output Section
+ GenClock
Source Destination Delay (ns)
\PhDet1:Net_9\/q LED8(0)_PAD 30.371
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q Net_1500/main_0 2.530
macrocell3 U(3,0) 1 Net_1500 Net_1500/main_0 Net_1500/q 3.350
Route 1 Net_1500 Net_1500/q LED8(0)/pin_input 7.021
iocell8 P12[6] 1 LED8(0) LED8(0)/pin_input LED8(0)/pad_out 16.220
Route 1 LED8(0)_PAD LED8(0)/pad_out LED8(0)_PAD 0.000
Clock Clock path delay 0.000
\PhDet1:Net_9\/q LED4(0)_PAD 27.968
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q Net_1501/main_0 2.533
macrocell4 U(3,0) 1 Net_1501 Net_1501/main_0 Net_1501/q 3.350
Route 1 Net_1501 Net_1501/q LED4(0)/pin_input 6.244
iocell7 P3[6] 1 LED4(0) LED4(0)/pin_input LED4(0)/pad_out 14.591
Route 1 LED4(0)_PAD LED4(0)/pad_out LED4(0)_PAD 0.000
Clock Clock path delay 0.000
Net_1336/q LED1(0)_PAD 25.880
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell2 U(2,0) 1 Net_1336 Net_1336/clock_0 Net_1336/q 1.250
Route 1 Net_1336 Net_1336/q LED1(0)/pin_input 9.379
iocell5 P0[0] 1 LED1(0) LED1(0)/pin_input LED1(0)/pad_out 15.251
Route 1 LED1(0)_PAD LED1(0)/pad_out LED1(0)_PAD 0.000
Clock Clock path delay 0.000
+ Asynchronous Constraints
+ Recovery
Path Delay Requirement : 20.8333ns(48 MHz)
Affects clock : CyMASTER_CLK
Source Destination FMax Delay (ns) Slack (ns) Violation
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1274/ar_0 130.107 MHz 7.686 13.147
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.580
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1274/ar_0 5.106
macrocell1 U(2,0) 1 Net_1274 RECOVERY -0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1336/ar_0 130.107 MHz 7.686 13.147
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.580
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1336/ar_0 5.106
macrocell2 U(2,0) 1 Net_1336 RECOVERY -0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/ar_0 145.582 MHz 6.869 13.964
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.580
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/ar_0 4.289
macrocell26 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ RECOVERY -0.000
Clock Skew 0.000
Path Delay Requirement : 1000ns(1 MHz)
Source Destination FMax Delay (ns) Slack (ns) Violation
\PhDet1:Net_9\/q \PhDet1:Net_15\/ar_0 106.655 MHz 9.376 990.624
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:Net_321\/main_0 2.530
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_0 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_15\/ar_0 2.246
macrocell5 U(3,0) 1 \PhDet1:Net_15\ RECOVERY -0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:Net_9\/ar_0 106.655 MHz 9.376 990.624
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:Net_321\/main_0 2.530
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_0 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_9\/ar_0 2.246
macrocell9 U(3,0) 1 \PhDet1:Net_9\ RECOVERY -0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:Net_15\/ar_0 106.826 MHz 9.361 990.639
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:Net_321\/main_1 2.515
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_1 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_15\/ar_0 2.246
macrocell5 U(3,0) 1 \PhDet1:Net_15\ RECOVERY -0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:Net_9\/ar_0 106.826 MHz 9.361 990.639
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:Net_321\/main_1 2.515
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_1 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_9\/ar_0 2.246
macrocell9 U(3,0) 1 \PhDet1:Net_9\ RECOVERY -0.000
Clock Skew 0.000
+ Removal
Source Destination Slack (ns) Violation
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/ar_0 6.329
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.040
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 \PhaseGen1:PWM:PWMUDB:runmode_enable\/ar_0 4.289
macrocell26 U(2,1) 1 \PhaseGen1:PWM:PWMUDB:runmode_enable\ REMOVAL 0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1274/ar_0 7.146
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.040
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1274/ar_0 5.106
macrocell1 U(2,0) 1 Net_1274 REMOVAL 0.000
Clock Skew 0.000
\PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1336/ar_0 7.146
Type Location Fanout Instance/Net Source Dest Delay (ns)
controlcell3 U(2,1) 1 \PhaseGen1:ControlEnable:Sync:ctrl_reg\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/busclk \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 2.040
Route 1 \PhaseGen1:Net_228\ \PhaseGen1:ControlEnable:Sync:ctrl_reg\/control_0 Net_1336/ar_0 5.106
macrocell2 U(2,0) 1 Net_1336 REMOVAL 0.000
Clock Skew 0.000
Source Destination Slack (ns) Violation
\PhDet1:Net_15\/q \PhDet1:Net_15\/ar_0 9.361
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:Net_321\/main_1 2.515
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_1 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_15\/ar_0 2.246
macrocell5 U(3,0) 1 \PhDet1:Net_15\ REMOVAL 0.000
Clock Skew 0.000
\PhDet1:Net_15\/q \PhDet1:Net_9\/ar_0 9.361
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell5 U(3,0) 1 \PhDet1:Net_15\ \PhDet1:Net_15\/clock_0 \PhDet1:Net_15\/q 1.250
Route 1 \PhDet1:Net_15\ \PhDet1:Net_15\/q \PhDet1:Net_321\/main_1 2.515
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_1 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_9\/ar_0 2.246
macrocell9 U(3,0) 1 \PhDet1:Net_9\ REMOVAL 0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:Net_15\/ar_0 9.376
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:Net_321\/main_0 2.530
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_0 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_15\/ar_0 2.246
macrocell5 U(3,0) 1 \PhDet1:Net_15\ REMOVAL 0.000
Clock Skew 0.000
\PhDet1:Net_9\/q \PhDet1:Net_9\/ar_0 9.376
Type Location Fanout Instance/Net Source Dest Delay (ns)
macrocell9 U(3,0) 1 \PhDet1:Net_9\ \PhDet1:Net_9\/clock_0 \PhDet1:Net_9\/q 1.250
Route 1 \PhDet1:Net_9\ \PhDet1:Net_9\/q \PhDet1:Net_321\/main_0 2.530
macrocell6 U(3,0) 1 \PhDet1:Net_321\ \PhDet1:Net_321\/main_0 \PhDet1:Net_321\/q 3.350
Route 1 \PhDet1:Net_321\ \PhDet1:Net_321\/q \PhDet1:Net_9\/ar_0 2.246
macrocell9 U(3,0) 1 \PhDet1:Net_9\ REMOVAL 0.000
Clock Skew 0.000